Archive for December, 2011
Caeleste hits the news with a short presentation of its recent work published on image-sensors-world.
“Caeleste publications page has been updated to include the latest CNES Workshop 2011 presentations. The most interesting one is “A 0.5 noise electrons CMOS pixel” by Bart Dierickx, Nayera Ahmed, and Benoit Dupont. The presentation explains the 1/f and RTS noise reduction principle by cycling the pMOSFET between accumulation and inversion”
Read more… and discuss on image-sensors-world.
ESO published results of a joint project with e2v and Caeleste at the CNES conference on High performance CMOS image sensors. it describes a “High QE, Thinned Backside-Illuminated, 3e- RoN, Fast 700fps, 1760×1760 Pixels Wave-Front Sensor Imager with Highly Parallel Readout”
With courtesy of ESO, we are pleased to make the presentation available for download from this link.
you can find all our papers in our publication section.
Caeleste published this week its first measurement results of a 0.5 e- noise RMS CMOS image sensor at the occasion of the CNES Workshop on High performance CMOS image sensors in Toulouse, France. starting from a 2 e- RMS baseline obtained with in-pixel CTIA amplifier, the noise is further reduced by oversampling of uncorrelated pixel data. decorelation is achieved by 1/f noise “reseting function”. The presentation is available for download as pdf here.
A second generation of the ZPS technology is under process at the moment with a dedicated column structure aiming at performing most of the operation on-chip with a further reduction of noise expected to be below 0.3 e-.